問題:
The WFM601M cannot lock to a specific signal until the sync selection is changed from AFC to DIRECT in the FORMAT menu. On this signal+ jitter measures ~30 ns+ with high peaks at the vertical interval; the eye pattern is completely closed. When I switch between AFC and Direct+ no difference is seen in the jitter display or measurement. Why doesn't the jitter measurement change?
答案:
The serial receiver in the WFM601M recovers a parallel rate clock. This clock recovery circuit is 5 MHz wide and as such it will pass jitter from the input serial signal to the recovered parallel clock if the jitter frequency is 5 MHz or less. This recovered parallel clock is sent three places: (1) eye pattern time base, (2) jitter display mode demodulator, and (3) AFC/Direct PLL circuit.
The eye pattern time base generates a frequency-offset clock to implement the sequential sampling. Within this time base, you can select from three PLL bandwidths: 10 Hz, 100 Hz, or 1 kHz. The selected clock bandwidth essentially implements a jitter high pass filter for the eye pattern display. For example, if 1 kHz is selected then only jitter terms above 1 kHz show up in the eye pattern. This CLOCK BW setting is in the EYE PATTERN CONFIG menu, and is independent of the JITTER display JITTER HPF settings or the AFC/DIRECT setting.
The jitter display mode is generated with a jitter demodulator. The 5 MHz wide parallel clock (27 MHz) is used to generate a second 27 MHz clock, but with a very narrow (10 Hz) clock recovery bandwidth. So now there are two 27 MHz clocks: one with a 5 MHz clock BW (carrying jitter from DC to 5 MHz), and the second with a 10 Hz clock BW (carrying jitter from DC to 10 Hz). These two clocks are applied to a mixer (demodulator), which outputs the difference between the clocks: any phase modulation (jitter) between 10 Hz and 5 MHz. This ANALOG jitter signal goes to the rear panel (JITTER OUT), to a set of peak-to-peak detectors followed by an A/D to produce the TIMING JITTER readout, and to a switchable high pass filter. This high pass filter has four selections: 10 Hz, 1 kHz, 10 kHz, and 100 kHz. For example, if 10 kHz is selected, then the filter outputs jitter between 10 kHz and 5 MHz. The filter output goes two places: to a second peak-to-peak detector followed by an A/D to produce the HPF JITTER readout; and to the scope's vertical deflection, producing the jitter verses time display. Note that the JITTER HPF setting in CONFIG JITTER affects the jitter waveform display. Or put another way, the jitter waveform correlates to the HPF jitter readout display.
Finally, the AFC/DIRECT PLL circuit provides the timing clocks for the video coprocessor, video DACs, and the sweep generation. In AFC, a new 27 MHz clock is generated with a 200 Hz wide PLL. This PLL removes jitter greater than 200 Hz, for better video D/A conversion. However, this also reduces the ability to tolerate jitter (timing margins between data and clock) above 200 Hz. When the jitter tolerance is exceeded, the coprocessor malfunctions, and garbled displays result. DIRECT bypasses this PLL, and has much higher jitter tolerance. However, the jitter will affect the linearity of the D/A conversion.
This explains why:
- AFC/DIRECT does not affect the jitter readouts or the jitter display (it does affect the sweep trigger, but there is not enough horizontal magnification to see 20 ns).
- The AFC/DIRECT (FORMAT menu), CLOCK BW (EYE PATTERN menu), and JITTER HPF (JITTER menu) selections are essentially independent.
The jitter levels of 30 ns are not that unusual. It is common to see jitter events correlated with field and line rate, which is why the jitter display mode in the WFM601M has video rate sweeps. A 30 ns jitter definitely shows equipment with a design problem, and it is large enough that not all equipment will work with it (you can usually assume at least 2 UI p-p jitter tolerance between 10 Hz and 1 kHz in video gear).
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