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David Bouse's blog

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PCI Express 128GT/s PAM4 Eye
Where Are We Going after PCIe 6? Tuesday, October 10, 2023
The physical layer of PCIe Express® has rapidly evolved from Gen 4.0 to Gen 5.0 and finally to Gen 6.0 with a 6.0 spec that describes everything that's necessary to develop silicon. We’ve gone from 16 to 32 and for Gen 6.0 up to 64 GT/s (Giga-transfers per second). And for the first time, we've gone to PAM4 multi-level signaling that allows us to encode two bits of information into a single unit …
#Oscilloscope #PCIe
PCI Express
How Do the Latest PCIe Generations Compare to IEEE 802.3ck Electrical Ethernet? Tuesday, November 9, 2021
One of the featured sessions during the 2021 Tektronix Innovation Forum was one entitled PCIe Gen5, Gen6 Development and Contrast to IEEE 802.3ck Electrical Ethernet, featuring myself and my colleague, Pavel Zivny. At that session we began by discussing the current status for PCI Express 5.0 at 32 GBd NRZ.  Next, we looked ahead to the transition to PCI Express 6.0 at 32 GBd PAM4, reviewing key …
#Oscilloscope #Software
Circuit board with PCI slots
PCIe Gen 5 Testing Challenges – Spread Spectrum Clocking (SSC) Thursday, June 3, 2021
Spread Spectrum Clocking (SSC) is a highly effective technique utilized to reduce electromagnetic interference or EMI. PCI Express 5.0 System designers use this tool to reduce the adverse effects on adjacent circuits and to pass FCC or other regulatory body requirements for EMI emissions. Manifestations of EMI can result in performance degradation and loss of digital information. Validation of …