Rambus Memory Bus Support

• Acquires data from the bus at up to 400 MHz (800 MT/s)
• Acquired Rambus packets are deserialized by the probe adapter and presented to the TLA logic analyzer as full packets.
• Symbolically identifies all bus cycles types
• Acquired data can be linked directly to HLL source files for source level debug
• 500 ps timing resolution enables detailed analysis of setup and hold times, edge-to-edge relationships, control timing, etc.
• All data acquired by the logic analyzer is time stamped to enable accurate time correlation of code execution to other system busses or hardware activity.

Probing

The probe adapter provides a physical connection between a RIMM socket and the logic analyzer probes.

Minimum System Requirements

• TLA7xx mainframe and two modules: one TLA7x3 acquisition module, 102 channels, 100 MHz state, 32K deep (200 MHz state and up to 64M deep available)
• And one TLA7x4 acquisition module, 136 channels, 100 MHz state, 32K deep (200 MHz state and up to 64M deep available)
• qty 7: P6434 high-density mictor probes
• TLA application software version 2.0 or greater

Package Includes

• Instrument setup software including clocking and channel assignments
• Symbol table of all bus cycle names
• User manual

Notes and Exceptions

Acquisition modules must be installed in adjacent mainframe slots and merged. If using a combination of 102-channel and 136-channel modules, the 102-channel module must be installed in the higher numbered slot. Reference full manual for probe adapter installation.

Ordering Information

For information on availability and pricing, contact your Account Manager. 
For technical questions, please contact the Tektronix Support Center.